There may be better ways of doing this... but here was my way:
You are running gate level or rtl simulations, and the simulation gets stuck. Yup, what do you do?
Simple answer is not to have combinational loops. If you do, perhaps you've done something wrong. If you must have combinational loops, or you are debugging someone else's code, then here's the way I found the loop path. This is especially useful when you are unfamiliar with the code, and the code spans many files and many processes.
Use NCSIM's built in "Create Force" option. I just debugged a combinational loop, and this worked like clockwork. I could follow the whole loop, and figure out which branches were being taken by selectively forcing signals. When a force caused the simulation to continue, that signal is part of the loop. If the force had no effect, that signal is not part of the loop. This worked well for me as it didn't take too long to get the simulator stuck. If it takes a long time before it gets stuck this may not work well as it requires continuously restarting the simulation to test each sequential branch.
I am getting a problem.
ReplyDeleteIn NCSim it takes long time for simulation.
While running the same code with Questa do not take that much of time.
Can you help me?
Thanks