my history

During my tenure at Mango DSP Ltd (1/2001 - 7/2008), I began as a C++ developer working on basic GUI software. I moved onto developing C code for Analog Devices DSPs with interfaces to Altera FPGAs. As time went on I rewrote all the Windows drivers bringing support to Windows 2000/XP with WDM. I was promoted to Manager of Infrastructures taking on the responsibility for low-level DSP and host libraries. In 2004 I began to venture into FPGA design. I rewrote Mango's complete low-level FPGA infrastructure code bringing down compile times to a fraction of what they previously were, while at the same time significantly lowering resource usage. I was given the additional title as Senior FPGA Engineer at Mango DSP Ltd. I rewrote complete Altera Stratix FPGA designs for image processing systems in a very short time with successful results. I wrote Lattice FPGAs both for Mango DSP Ltd., and for my next employer VisionMap Ltd (8/2008 - 9/2009). My final project at VisionMap Ltd. was a high-bandwidth high-speed Xilinx Virtex 5 design. I built a complete scatter gather DMA engine core for usage with Xilinx's Endpoint Block Plus for PCI Express. I converted an algorithm written in C to a pipelined implementation in the FPGA. My design uses over 400 DSP48E blocks (instantiated manually), and over 250 BRAMs (also instantiated manually). I wrote the accompanying WDM scatter gather driver for testing and final operation.



I have decided to return to the US after 9 years in Israel and I am looking for new challenges and learning experiences there.